Embodiments of the present inventive concept relate to resistive memory devices, and more particularly, to a resistive memory device initializing a resistive memory cell using at least one initialization path without affecting a normal path. Embodiments of the inventive concept also relate to initialization methods for resistive memory devices and electronic devices including resistive memory devices.
The resistance of a resistor element within a resistive memory cell (a “memory resistor”) may be varied in accordance with a voltage or current supplied to the memory resistor. Using this resistance variability, a resistive memory cell may be adapted to store information correlated with different memory resistor states. The Phase change Random Access Memory (PRAM) uses one or more constituent phase change materials and particular applications of voltage/current to define two or more resistance states, where each resistance state is indicative of a corresponding stored data value.
The Magneto-resistive Random Access Memory (MRAM) uses a difference between magnetic spin directions for a magnetic pinned layer and a magnetic free layer to define an aligned state or an unaligned state. These differing magnetically induced resistance states may be correlated with respective data values.
Oxide semiconductors, such as the nickel oxide (NIO) semiconductors, analogously define resistance differences related to a thin filament formed inside the oxide, and the Conductive Bridging Random Access Memory (CBRAM) defines resistance difference related to an accumulation of ions.
In each of the foregoing memory technologies, a particular memory cell may be variously placed into one of a number of possible states (e.g., a set state, reset state, program state, erase state, etc.) Corresponding memory system operations (e.g., a program operation, erase operation, write operation, etc.) are used to create the voltage/current conditions necessary to place the resistive memory cell into the desired state. As is conventionally understood, many resistive memory cells may be placed into a so-called “initialization state.” In the context of binary resistive memory cells, the initialization state is a third type of state different from the high resistance state or a low resistance state used to store data.
For example, the filament type resistive random access memory (RRAM) varies memory cell resistance according to the placement of a filament within an oxide. In order to initialize the filament type RRAM for use, the filament must be initially formed inside the oxide after fabrication. To do this, an initialization operation (or a “forming”) is executed on the RRAM. However, as provided from the manufacturer, and prior to memory cell forming, the resistance of memory cells in the RRAM is much greater than the high resistance state thereafter used to indicate a particular data state. Hence, before the forming or initialization operation is executed, resistive memory cells will be in an initialization state and will exhibit corresponding operating characteristics. Thus, the execution of one or more initialization operations must necessarily occur prior to the delivery of a memory system including resistive memory cells.
The foregoing examples (PRAM, MRAM, RRAM, CBRAM) are just that—examples. Those skilled in the art understand that considerable research is on-going in the field of resistive memories and it is highly likely that other types of resistive memories will emerge in the near future. However, despite the fact that resistive memories will vary by structure and operating principles, initialization will remain an essential part of the processes required to provide a working resistive memory system.
This being the case, it should further be noted that the initialization of a resistive memory typically requires a voltage/current (e.g., around 3V) that is much greater than the voltage/current (e.g., around 1V) used during a program or write operation. This unique initialization operation requirement is particularly burdensome from a design standpoint, since initialization will usually be performed only once during a testing phase for the resistive memory prior to customer delivery. In addition to using a much greater “initialization voltage” (as compared with a program voltage), the initialization operation applies the initialization voltage to resistive memory cells for a time period much greater than a normal programming time period. In combination, these operating requirements singularly driven by the one-time-executed, but essential initialization operation tend to force an over-design of the constituent resistive memory and otherwise consume memory system resources, both hardware and software.